PXI-5422
May 27, 2026

PXI-5422

I. Product Introduction The PXI-5422 is a 3U PXI single-slot, 1-channel, 16-bit, 200 MS/s high-performance arbitrary waveform generator produced by National Instruments (NI). It is an upgraded version of the PXI-5421, featuring higher sampling rate, 80 MHz bandwidth, lower phase noise, large memory capacity, and multi-card ps-level synchronization. It is mainly used for precise excitation testing in fields such as communication intermediate frequency, semiconductors, and automotive electronics. It is currently in use and there is no production halt plan.

Description

II. Model Interpretation

PXI: 3U PXI standard bus, single slot, compatible with PXI/PXIe chassis.

5422: NI 5400 series high-performance arbitrary waveform generator:

54xx: Arbitrary waveform / function generator series

x4x: Analog output, medium-high bandwidth

xx22: 1 channel, 16 bits, 200 MS/s, 80 MHz bandwidth high-performance upgraded version

Component number (by memory):

779087‑01: 8 MB

779087‑02: 32 MB

779087‑03: 256 MB (top configuration) NI

III. Technical Parameters (25℃, 50 Ω terminal, typical values)

1. Basic Performance

Channel number: 1 analog output

Resolution: 16-bit DAC

Sampling rate: 200 MS/s; equivalent to 400 MS/s after 2x interpolation

Bandwidth (‑3 dB): 80 MHz (sine / square wave) NI

Output amplitude: 12 Vpp (±6 V) @ 50 Ω; software adjustable from 5.64 mVpp to 12 Vpp

Output impedance: 50 Ω / 75 Ω (software selectable)

Frequency resolution: 0.355 μHz (DDS, phase continuous)

Noise density: -148 dBm/Hz (low noise)

SFDR: 91 dBc @ 10 MHz

THD: -62 dBc @ 10 MHz

2. Standard waveform frequency upper limit

Sine: 80 MHz

Square wave: 40 MHz

Triangle / Sawtooth: 10 MHz

3. Storage and Synchronization

Waveform memory: 8/32/256/512 MB (optional, SMC shared memory)

Synchronization accuracy: <20 ps RMS skew between multiple modules (NI-TClk)

Trigger / Clock: PXI trigger bus, REF IN/OUT (10 MHz), PFI

4. Environment and Power Consumption

Operating temperature: 0~55℃

Power consumption: approximately 25.7 W

Size: 3U single slot (about 160×100 mm)

IV. Interface and Communication Configuration

Front panel (single slot cover, 4×SMB)

CH0 (SMB): Analog output, 50/75 Ω selectable, ±6 Vmax

REF IN (SMB): External reference clock input (10 MHz, PLL lock) NI

REF OUT (SMB): Internal 10 MHz reference output NI

PFI0/PFI1 (SMB): Programmable trigger input / output NI

Bus and system interface

PXI backplane: 32-bit PCI, PXI trigger bus (TRIG0–TRIG6), RTSI

Data transfer: PCI bus, waveform download rate up to 160 MB/s

Synchronous clock: Route internal sampling clock to PFI, PXI trigger bus, RTSI

Software driver

Driver: NI-FGEN 2.2.1+ (standard)

Support environment: LabVIEW, TestStand, Python, C#, LabWindows/CVI

Configuration tool: NI MAX, soft front panel SFP, NI Analog Waveform Editor

V. Core Function

200 MS/s high sampling rate + 80 MHz bandwidth: Strong high-frequency response, high waveform fidelity, suitable for communication intermediate frequency and high-speed analog excitation. 16-bit high-resolution + low noise: -148 dBm/Hz noise density, 91 dBc SFDR, large dynamic range, pure spectrum.

Super large onboard memory: up to 512 MB, no segmented playback for long waveforms / complex sequences, supports continuous data stream output.

SMC synchronous storage core: <20 ps multi-card synchronization, seamless synchronization with PXI digital instrument, digital I/O, builds a mixed-signal test station.

Rich modulation and function simulation: AM/FM/PM, sweep, burst; built-in function generator mode, fast output of standard waveforms.

LVDS digital output (high-end version): 256/512 MB models with 16-bit LVDS, synchronous output of digital Pattern, suitable for mixed-signal testing.

Six, applicable scenarios

Communication equipment testing: intermediate frequency (IF) signal simulation, modulation signal generation, receiver sensitivity / anti-interference testing.

Mixed-signal ATE: verification of 16-bit ADC/DAC, precision amplifier / filter testing, timing verification of high-speed interfaces (such as PCIe).

Semiconductor testing: low-frequency excitation of RF front-end, signal simulation of memory chips, precise excitation of power management chips (PMIC).

Automotive electronics: precise excitation of ECU, ADAS radar signal simulation, vehicle network timing verification.

Aerospace / defense: radar intermediate frequency signal simulation, sensor simulation, timing test of military electronic equipment.

Seven, usage and maintenance instructions

1. Installation and power-on

Power off installation, single slot fixed; chassis reliable grounding to prevent static electricity.

Power on preheating for 15 minutes, NI MAX self-check without hardware errors.

Keep ventilation during operation, temperature ≤ 55℃, avoid blocking the chassis fan.

2. Wiring and operation

Use 50 Ω high-precision coaxial cable for signal output, SMB connector tightened to reduce reflection.

Short-circuit protection for output (no damage from long-term grounding), but it is recommended to match the load (50/75 Ω).

Amplitude setting does not exceed 12 Vpp; high frequency (>1 MHz) priority AC coupling.

Multi-card synchronization: share 10 MHz reference clock, enable NI-TClk, ensure phase coherence.

3. Calibration and maintenance

Calibration cycle: recommended 2-year 1-time NIST traceable calibration; daily use internal self-calibration to compensate for temperature drift.

Interface maintenance: regularly clean SMB interface, keep dry; long-term idle add dust cap.

Environmental requirements: no condensation, humidity 10%–90% RH; away from strong electromagnetic interference and vibration.

Prohibited: power-on unplugging cables, severe vibration, overheating operation.


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