II. Model Interpretation

PXI: 3U PXI standard bus, single slot, compatible with PXI/PXIe chassis.

5421: NI 5400 series high-performance arbitrary waveform generator:

54xx: Arbitrary waveform / function generator series

x4x: Analog output, medium-high bandwidth

xx21: 1 channel, 16 bits, 100 MS/s, 43 MHz bandwidth basic high-performance version

Part number:

778697‑01: 8 MB memory

778697‑02: 32 MB memory (with LVDS)

778697‑03: 256 MB memory (with LVDS)

III. Technical Parameters (25℃, 50 Ω termination, typical values)

1. Basic Performance

Channel number: 1 analog output

Resolution: 16-bit DAC

Sampling rate: 100 MS/s; equivalent to 400 MS/s after 8 times interpolation

Bandwidth (–3 dB): 43 MHz (sine / square wave)

Output amplitude: 12 Vpp (±6 V) @ 50 Ω; software adjustable from 5.64 mVpp to 12 Vpp (NI)

Output impedance: 50 Ω / 75 Ω (software selectable by NI)

Frequency resolution: 0.355 μHz (DDS, phase continuous)

SFDR: 91 dBc @ 10 MHz

THD: –67 dBc @ 10 MHz

2. Standard waveform frequency upper limit

Sine: 43 MHz

Square wave: 20 MHz

Triangle / Sawtooth: 5 MHz

3. Storage and Synchronization

Waveform memory: 8/32/256 MB (optional, SMC shared memory)

Synchronization accuracy: <20 ps RMS skew between multiple modules (NI-TClk)

Trigger / Clock: PXI trigger bus, REF IN/OUT (10 MHz), PFI

4. Environment and Power Consumption

Operating temperature: 0～55℃ (NI)

Power consumption: approximately 18 W

Size: 3U single slot (about 160×100 mm)

IV. Interface and Communication Configuration

Front panel (single slot cover, 4×SMB)

CH0 (SMB): analog output, 50/75 Ω selectable, ±6 Vmax

REF IN (SMB): external reference clock input (10 MHz, PLL lock)

REF OUT (SMB): internal 10 MHz reference output

PFI0/PFI1 (SMB): programmable trigger input / output

Bus and system interface

PXI backplane: 32-bit PCI, PXI trigger bus (TRIG0–TRIG6), RTSI

Data transfer: PCI bus, waveform download rate up to 84 MB/s

Synchronous clock: routable internal sampling clock to PFI, PXI trigger bus, RTSI

Software driver

Driver: NI-FGEN (standard)

Support environment: LabVIEW, TestStand, Python, C#, LabWindows/CVI

Configuration tool: NI MAX, soft front panel SFP, NI Analog Waveform Editor

V. Core Functions

16-bit high resolution + 43 MHz bandwidth: low noise, low distortion, suitable for precise analog excitation and mid-high frequency signal simulation.

100 MS/s sampling + 8 times interpolation: equivalent to 400 MS/s, high waveform fidelity, pure spectrum. Super large onboard memory: up to 256 MB, long waveform / complex sequence without segmented playback.

SMC synchronous storage core: <20 ps multi-card synchronization, seamless synchronization with PXI digital instrument, digital I/O.

Rich modulation and function simulation: AM/FM/PM, sweep frequency, burst; built-in function generator mode, fast output of standard waveforms.

LVDS digital output (high-end version): 32/256 MB models with 16-bit LVDS, synchronous output of digital Pattern.

Six, applicable scenarios

Mixed signal ATE: 16-bit ADC/DAC verification, precision amplifier / filter testing, power management chip (PMIC) excitation.

Semiconductor testing: low-frequency section excitation of RF front-end, high-speed interface timing verification, memory chip signal simulation.

Communication equipment testing: intermediate frequency signal simulation, modulation signal generation, receiver sensitivity test.

Automotive electronics: ECU precise excitation, ADAS signal simulation, vehicle radar signal simulation.

Research and education: biological electrical signal simulation, precise excitation for physical experiments, high-speed signal processing teaching platform.

Seven, usage and maintenance instructions

1. Installation and power-on

Power off installation, single slot fixed; chassis reliable grounding to prevent static electricity.

Power on preheating for 15 minutes, NI MAX self-check without hardware errors.

Keep ventilation during operation, temperature ≤ 55℃, avoid blocking the chassis fan.

2. Wiring and operation

Use 50 Ω high-precision coaxial cable for signal output, tighten SMB connector to reduce reflection.

Output must not be short-circuited; the load must be matched (50/75 Ω) to prevent overcurrent damage to NI.

Amplitude setting does not exceed 12 Vpp; high frequency (>1 MHz) priority AC coupling.

Multi-card synchronization: share 10 MHz reference clock, enable NI-TClk, ensure phase coherence.

3. Calibration and maintenance

Calibration cycle: recommended 2-year 1-time NIST traceable calibration; daily use internal self-calibration to compensate for temperature drift.

Interface maintenance: regularly clean SMB interface, keep dry; add dust cap for long-term idle.

Environmental requirements: no condensation, humidity 10%–90% RH; away from strong electromagnetic interference and vibration.

Prohibited: power-on unplugging cables, severe vibration, overheating operation.