PXI-5402
May 27, 2026

PXI-5402

I. Product Introduction The PXI-5402 is a 3U PXI single-slot, 1-channel, 14-bit, 20 MHz arbitrary waveform/function generator launched by National Instruments (NI). It is based on DDS (Direct Digital Synthesis) technology and offers the capability of standard functions + user-defined arbitrary waveforms. It features low phase noise, precise frequency resolution, and PXI system-level synchronization. It is widely used in mixed-signal testing, semiconductor and automotive electronic excitation. It is now out of production (Obsolete). Recommended replacement: PXI-5422NI.

Description

II. Model Interpretation

PXI: 3U PXI standard bus, single slot, compatible with PXI/PXIe chassis.

5402: NI 5400 series waveform generator, meaning:

54xx: Arbitrary waveform / function generator series

x4x: Analog output, bandwidth 20–40 MHz

xx02: 1 channel, 14-bit, 20 MHz version (compared to 5406: 16-bit, 40 MHz)

Part number: 779655-01 (standard for PXI-5402).

III. Technical Parameters (25℃, 50 Ω termination, typical values)

1. Basic Performance

Channel number: 1 analog output

Resolution: 14-bit DAC

Bandwidth (–3 dB): 20 MHz (sine / square wave)

Output amplitude: 10 Vpp (±5 V) @ 50 Ω; software adjustable ±1 V to ±5 V

Output impedance: 50 Ω (fixed)

Sampling rate: Basic 100 MS/s; interpolated ×4 equivalent to 400 MS/s

Frequency resolution: 0.355 μHz (DDS, phase continuous)

2. Standard Waveform Frequency Upper Limit

Sine / square wave: 20 MHz

Triangle / sawtooth: 1 MHz

Noise / DC: full bandwidth

3. Storage and Filtering

Arbitrary waveform memory: 32 kB / channel (user-defined)

Digital filtering: FIR interpolation (×2/×4, software selectable)

Analog filtering: 7th-order elliptic low-pass (software switch) NI

4. Synchronization and Timing

Synchronization technology: NI-TClk (multi-card ps-level synchronization)

Trigger / clock: PXI trigger bus, SYNC (TTL) output

Harmonic suppression: <–60 dBc @10 MHz (typical)

5. Environment and Power Consumption

Operating temperature: 0–55℃

Storage temperature: –40–70℃

Power consumption: approximately 12 W

Size: 3U single slot (about 160×100 mm)

IV. Interface and Communication Configuration

Front panel (single-slot cover)

CH0 (BNC): analog output, 50 Ω, ±5 Vmax

SYNC (BNC): TTL synchronous output (for trigger / clock synchronization)

Bus and system interface

PXI backplane: 32-bit PCI, PXI trigger bus (TRIG0–TRIG6), RTSI

Synchronization clock: routable internal sampling clock / reference clock to:

Front panel SYNC/PFI

PXI trigger bus

RTSI bus (multi-card synchronization)

Software driver

Driver: NI-FGEN (standard)

Support environment: LabVIEW, TestStand, Python, C#, LabWindows/CVI

Configuration tool: NI MAX (device management / calibration), soft front panel SFP

V. Core Functions

DDS precise frequency synthesis: 0.355 μHz resolution, continuous phase frequency / sweep, low-jitter square wave output.

Rich waveform generation: built-in sine, square wave, triangle, sawtooth, noise, DC, pulse; supports 32 kB arbitrary waveform customization and sequence output.

10 Vpp high output drive: 50 Ω fixed impedance, suitable for RF / high-frequency loads, excellent harmonic suppression.

Multi-instrument ps-level synchronization: NI-TClk technology, synchronizes with PXI oscilloscopes (such as 5154), digital cards to build a mixed-signal test station.

Flexible modulation and burst: AM/FM/PM, linear / logarithmic sweep frequency, gated burst, phase-coherent multi-sequence.

VI. Application Scenarios

Mixed-signal testing: Amplifiers, filters, ADC/DAC, power management chips (PMIC) excitation and verification.

Semiconductor testing: Function verification, parameter testing, aging/reliability excitation of digital/analog chips.

Automotive electronics: Sensor signal simulation, ECU testing, CAN/LIN bus node excitation, vehicle power supply ripple simulation.

Research and education: Physical experiment signal source, bioelectric simulation, signal processing teaching experiment.

PXI system integration: Synchronize with PXI oscilloscopes, high-speed digital I/O, switch matrix; build an automated testing platform.

VII. Usage and Maintenance Instructions

1. Installation and Power On

Power off installation, single slot fixed; chassis reliable grounding to prevent static electricity.

Power on preheating for 15 minutes, NI MAX self-check without hardware errors.

Keep ventilation during operation, temperature ≤ 55℃, do not block the chassis fan.

2. Wiring and Operation

High-frequency signals use 50 Ω high-precision coaxial cables, BNC tightened to reduce reflection.

Output short-circuit prohibited; load no less than 50 Ω to avoid overcurrent damage.

Amplitude setting does not exceed ±5 V; for high-frequency (>1 MHz), AC coupling is preferred.

Multi-card synchronization: Enable NI-TClk, share 10 MHz reference clock to ensure phase consistency.

3. Calibration and Maintenance

Calibration cycle: Suggested 1-time NIST traceable calibration every 2 years; use internal self-calibration to compensate for temperature drift.

Interface maintenance: Regularly clean BNC interface, keep dry; add dust cap for long-term inactivity.

Environmental requirements: No condensation, humidity 10%–90% RH; away from strong electromagnetic interference and vibration.

Prohibited: Plug cables while powered on, severe vibration, overheating operation.


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