PXIe‑6555
May 27, 2026

PXIe‑6555

The PXIe-6555 is a 3U single-slot PXIe digital waveform generator and analyzer developed by National Instruments. It integrates high-speed digital I/O and per-pin parameter measurement units, combining digital signal generation, acquisition and DC parameter testing in one module. With 24 single-ended bidirectional channels and a maximum clock frequency of 200 MHz, it supports comprehensive logic level and DC electrical characteristic tests. This all-in-one design is widely used for integrated circuit verification, embedded device testing and mixed-signal production test systems.

Description

Product Description

The PXIe-6555 is a 3U single-slot PXIe digital waveform generator and analyzer developed by National Instruments. It integrates high-speed digital I/O and per-pin parameter measurement units, combining digital signal generation, acquisition and DC parameter testing in one module. With 24 single-ended bidirectional channels and a maximum clock frequency of 200 MHz, it supports comprehensive logic level and DC electrical characteristic tests. This all-in-one design is widely used for integrated circuit verification, embedded device testing and mixed-signal production test systems.

Model Definition

PXIe stands for PXI Express bus with Gen1 ×4 specification, adopting standard 3U single-slot form factor. The model number 6555 represents a high-speed digital test module equipped with per-pin measurement units. Its core characteristics include 24 bidirectional channels, 200 MHz operating clock, built-in PPMU for DC measurement, hardware comparison function and multi-module synchronous capability.

Key Specifications

Channel and Electrical Parameters

The module provides 24 single-ended bidirectional channels, and each channel can be independently configured as input, output or high-impedance state. The programmable logic voltage range covers from -2 V to +7 V, compatible with common standard levels such as 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5 V. Each channel is integrated with a PPMU, which can source and sink current up to ±35 mA for DC voltage and current measurement. It also supports remote sense function to eliminate voltage drop caused by connecting cables. Each channel is equipped with 1 Mbit on-board memory for test pattern storage.

Timing and Performance Parameters

The maximum operating clock frequency is 200 MHz under SDR mode, delivering a peak data rate of 200 Mbit/s. The module uses high-precision clock circuit, with channel-to-channel jitter less than 1 ns. It supports real-time hardware bit comparison, error counting and stop-on-error functions to meet bit error rate test demands. It can achieve precise synchronization across multiple modules and multiple chassis via the backplane clock and trigger resources.

General Parameters

The device follows standard 3U PXI mechanical dimensions. It works stably within the temperature range from 0 °C to 55 °C. Built-in overvoltage, overcurrent and short-circuit protection circuits ensure operational safety during tests.

Interface and Communication Configuration

Host Bus Interface

It adopts PXIe Gen1 ×4 bus, featuring plug-and-play and DMA high-speed data transmission. The maximum input throughput reaches 660 MB/s and the maximum output throughput is 400 MB/s. It makes full use of PXI backplane resources including PXI_CLK100, PXI trigger bus and RTSI bus to realize clock distribution and signal synchronization between different modules.

Front Panel Physical Interfaces

Two 68-pin VHDCI connectors are arranged on the front panel. One is used for digital data and control signals, connecting 24 digital I/O channels, strobe signals and general purpose function I/O. The other carries remote sense signals for high-precision DC measurement. Three SMA ports are configured for clock and trigger signals. CLK IN is for external reference clock input, CLK OUT outputs reference clock to other devices, and PFI 0 acts as a programmable trigger and event terminal. Multiple programmable function I/O channels are reserved for auxiliary triggering and signal interaction.

Driver and Software Communication

The dedicated driver is NI-HSDIO with IVI standard compatibility. Users can complete hardware identification, self-test and basic parameter configuration through NI-MAX. Secondary development is available on mainstream platforms including LabVIEW, C/C++, Python and TestStand. The supporting application programming interfaces cover waveform editing, pattern arrangement, hardware comparison and PPMU parameter measurement.

Core Functions

It supports 24-channel high-speed bidirectional waveform generation and acquisition at 200 MHz, completing digital stimulus output and response capture synchronously. The built-in per-pin parameter measurement unit realizes DC voltage and current testing for each channel, covering common items such as input and output level, leakage current and driving current. The remote sense function effectively improves DC measurement accuracy by removing cable interference. The hardware comparison function conducts real-time bit-by-bit checking for bit error rate test and protocol verification. Rich clock and trigger resources support multi-module and multi-chassis synchronous operation to build large-scale parallel test systems. Overvoltage and overcurrent protection improves reliability for long-term continuous testing.

Application Scenarios

It is mainly applied to semiconductor and integrated circuit testing, conducting functional verification, timing margin test and DC parameter measurement for logic chips, MCUs and FPGAs. It is used for interface protocol test and signal integrity verification of embedded devices such as SPI, I²C and UART. It serves mixed-signal test systems to finish digital excitation and DC characteristic detection for power pins and general I/O ports. It is also applicable to automated production lines for batch functional testing of electronic products, as well as research and verification of digital systems in aerospace fields.

Usage and Maintenance Instructions

Usage Guidelines

Insert the module into a free slot of standard 3U PXIe chassis and fasten the fixing screws. Use matched shielded cables for signal connection. Keep the cable length within 1 meter under high-speed working conditions to reduce signal attenuation and crosstalk. Use 50-ohm coaxial cables for SMA clock ports to avoid signal reflection. Set channel direction, logic level, clock frequency and trigger mode via configuration software, and configure test patterns, comparison rules and PPMU measurement parameters according to actual test requirements. Calibrate the reference clock in advance when performing multi-device synchronous tests.

Maintenance Instructions

Regularly wipe the front panel and connectors with dry soft cloth to remove dust, and keep liquid away from the device. The module does not require frequent calibration. It is recommended to inspect logic level, driving current, timing performance and DC measurement accuracy every two years. When the module is not in use, store it in a dry environment with temperature ranging from -20 °C to 60 °C and relative humidity below 60%, and take anti-static measures. If abnormal operation occurs, firstly check wiring status, power supply and software configuration. For timing anomalies, inspect cables and grounding conditions. For abnormal output or measurement results, check whether the load is short-circuited or overloaded.


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