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PXIE-5645R

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PXIE-5645R
May 27, 2026

PXIE-5645R

The PXIe-5645R is a 4‑slot, software‑designed RF Vector Signal Transceiver (VST) from National Instruments, integrating a Xilinx Virtex‑6 LX195T FPGA. It combines a vector signal analyzer (VSA), vector signal generator (VSG), and a high‑speed differential/single‑ended baseband I/Q interface in one module. Covering 65 MHz to 6 GHz with 80 MHz instantaneous bandwidth (up to 200 MHz optional), it supports both RF and baseband testing for wireless, aerospace, and semiconductor applications.

Description

Model Nomenclature

  • PXIe: PXI Express high‑speed modular instrumentation bus.

  • 56: NI PXI RF/IF test & measurement series.

  • 45: 6 GHz frequency, 80 MHz bandwidth, extended baseband I/Q, 4‑slot form factor.

  • R: Reconfigurable (user‑programmable FPGA via LabVIEW FPGA).

Technical Specifications

  • Form Factor: 4‑slot 3U PXIe module.

  • Frequency Range: 65 MHz to 6 GHz; <1 Hz tuning resolution.

  • Instantaneous Bandwidth: 80 MHz (200 MHz optional).

  • RF Input (VSA): SMA, 50 Ω; noise floor –148 dBm/Hz (typ); IIP3 ≥19 dBm.

  • RF Output (VSG): SMA, 50 Ω; avg power up to +6 dBm; ACPR ≤–45 dBc.

  • Baseband I/Q: Differential/single‑ended, 16‑bit, 120 MS/s, 80 MHz complex bandwidth.

  • FPGA: Xilinx Virtex‑6 LX195T (user‑programmable).

  • Onboard Memory: 2×256 MB DRAM, 2 MB SRAM.

  • Digital I/O: 24 channels, up to 250 Mbit/s.

  • Reference: External 10 MHz (SMA), internal oscillator.

  • Trigger: PXI trigger bus, external TRIG (SMA, 3.3 V TTL).

  • Temperature: Operating 0 °C to 55 °C; Storage –40 °C to 70 °C.

Interface and Communication Configuration

  • Bus: PXIe Gen2 x4, peer‑to‑peer streaming, high‑speed DMA.

  • Drivers: NI‑5645R, IVI‑COM; compatible with LabVIEW, C/C++, Python, .NET.

  • Software: NI‑MAX (config), LabVIEW FPGA (custom processing), NI‑RFmx (standard measurements).

  • Synchronization: PXI trigger bus, NI‑TClk for multi‑module phase alignment.

  • I/O Connectors: 1×RF IN (SMA), 1×RF OUT (SMA), 1×10 MHz Ref In/Out (SMA), 1×TRIG (SMA), 24×Digital I/O, Baseband I/Q (differential/single‑ended).

Core Features

  • Integrated VSA/VSG + Baseband I/Q: Test RF and baseband signals with one instrument.

  • User‑Programmable FPGA: Real‑time filtering, modulation/demodulation, protocol decoding, and custom DSP.

  • Wideband RF Performance: 80 MHz bandwidth, 6 GHz coverage for 5G/LTE/Wi‑Fi 6/7/radar.

  • High Dynamic Range: Low noise floor and high linearity for accurate weak/strong signal measurement.

  • MIMO‑Ready: FPGA‑based synchronization enables multi‑module MIMO configurations.

Application Scenarios

  • Wireless R&D & Test: 5G/6G, LTE‑A, Wi‑Fi 6/7, Bluetooth, and RFID device validation.

  • RF + Baseband Test: Transceiver characterization, power amplifier/filter test, and baseband I/Q validation.

  • Aerospace & Defense: Radar signal generation/analysis, EW simulation, SIGINT.

  • Semiconductor Test: RFIC/transceiver ATE, high‑speed digital I/O, and protocol validation.

  • Software‑Defined Radio (SDR): Custom waveform prototyping, beamforming, and adaptive communications.

Usage and Maintenance Instructions

Installation & Configuration

Insert the module into a 4‑slot 3U PXIe chassis and secure the latch. Connect RF IN/OUT to the DUT via SMA cables; connect baseband I/Q as differential or single‑ended. Attach a 10 MHz external reference (optional). Power on the chassis; NI‑MAX auto‑detects the module. Configure frequency, power, bandwidth, and trigger via the NI‑5645R driver.

Operation Guidelines

Allow 30‑minute warm‑up before precision measurements. Do not apply >+33 dBm to RF IN. Use LabVIEW FPGA to develop custom IP; validate bitstreams for timing closure. For multi‑module MIMO, enable NI‑TClk and align triggers.

Daily Maintenance

Keep SMA/baseband connectors clean and dry; tighten cables gently. Inspect cables/connectors monthly for wear/corrosion. Perform annual external calibration. When unused, power off, disconnect cables, and store ESD‑safe. Avoid extreme temperature/humidity.


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